Finitron - Documents

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Glossary Page

glossary of terms

 

 

Getting Rid of Multiplexers

Reducing multiplexer usage in cores.

 

 

Large Constants

4 basic methods of handling large constants in an ISA

(power point)

 

 

Branches

Encoding branch instructions

 

 

Mystery Operation Processor

describes use of mystery operations in a processor

 

 

Virtual Keycodes

describes virtual keycode system for input devices

 

 

Interfacing to External Static RAM

 

 

 

WISHBONE Bus Spec B3

IP core interconnection bus specification (Also found on www.opencores.org)

Easy to understand, easy to use, and freely available.

 

Finitron Asynchronous Bus (FTA Bus)       Introduction of the FTA Bus

 

Reference Documents 

 

Publisher

Computer Architecture A Quantitative Approach

Second Edition

John L Hennesy & David Patterson

Morgan Kaufman Publishers, Inc.

San Francisco, California

 

 

Memory Systems Cache, DRAM, Disk

Bruce Jacob, Spencer W. Ng David T. Wang

Morgan Kaufman